Linear Pluggable Optics Consortium gets underway

A new Linear Pluggable Optics Multi-Source Agreement (LPO MSA) is underway to develop the specifications for networking equipment and optical modules.

The founding participants of the LPO MSA encompass a notable array of companies such as Accelink, AMD, Arista, Broadcom, Cisco, Eoptolink, Hisense, Innolight, Intel, MACOM, NVIDIA, and Semtech Corporation.

The initial target of the MSA is an optimized optical interconnect with LPO modules on both ends of the link. The LPO MSA specifications will define the electrical and optical requirements to ensure interoperability between multiple vendors of networking equipment and optics modules.

“There is an urgent need to reduce the network power consumption for AI and other high-performance applications,” said Mark Nowell, LPO MSA Chair. “LPO materially reduces power consumption both for the module and the system while maintaining a pluggable interface, providing the economics and flexibility that customers need for high-volume deployments.”

“The LPO MSA will enable a multi-source ecosystem for LPO optics modules which is essential for wide industry adoption,” said Andreas Bechtolsheim, Co-Chair LPO MSA. “We look forward to supporting the LPO MSA specifications.”

https://www.lpo-msa.org/

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Marvell demos 3D Silicon Photonics (SiPho) Engine

Marvell is demonstrating a 3D Silicon Photonics Engine designed for next-generation AI clusters and cloud data centers. The new device packs 32 channels of 200G electrical and optical interfaces for connecting next-generation AI clusters and cloud data centers at multi-terabit speeds. 

The 200 Gbps device delivers 2x the bandwidth, 2x the input / output (I/O) bandwidth density, and 30% lower power per bit compared to comparable devices with 100 Gbps electrical and optical interfaces.

“Advances in optical interconnect technology are necessary to realize the promise of AI and accelerated infrastructure,” said Dr. Loi Nguyen, executive vice president and general manager of Cloud Optics at Marvell. “Our 3D SiPho engine is designed to enable higher bandwidth, higher I/O density, and lower power optical interconnects that scale cloud service providers’ infrastructure to meet the growing bandwidth needs of emerging AI services and applications.”

https://www.marvell.com/ 

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TeraSignal intros CMOS Re-Driver for 800G LPO

TeraSignal has begun sampling a novel intelligent 400G (4x100G) PAM4 modulator driver with digital link training and link monitoring for 800G linear pluggable optical (LPO) modules. 

TeraSignal’s new TS8401/02 intelligent modulator driver addresses the limitations of traditional LPO modules, which unlike DSP-based re-timers, have lacked the capabilities for automatic adaptation, digital link monitoring and link training, making them challenging to integrate, interoperate, and deploy efficiently. By leveraging the existing microcontroller (MCU) in the LPO module, the TS8401/02 automates essential adjustments and introduces link diagnostics and link accountability, transforming LPO modules into adaptive link optimizing systems.

TeraSignal says its re-timer facilitates a closed-loop system that not only identifies but also rectifies link issues in real time, ensuring uninterrupted, high-quality data transmission across the board. The advanced CMOS implementation reduces power consumption by as much as 50% compared to existing Silicon Germanium (SiGe) solutions and significantly boosts link reliability and performance through statistical link monitoring and adaptive control capabilities.

“TeraSignal’s intelligent CMOS solution for LPO modules redefines high-speed interconnects, merging low latency and power efficiency with unmatched link performance measurement capabilities, diagnostics, and quick time to market,” said Dr. Armond Hairapetian, founder and CEO of TeraSignal. “We are committed to delivering IRD solutions with superior performance over both fiber and copper interconnects. By incorporating intelligence within the re-driver, we have introduced a new class of AI-centric CMOS devices that offer DSP-like features with significantly lower power and the lowest possible latency, setting a new industry standard for high-speed interconnects.”

Product Highlights

• Intelligent 400G (4x100G) PAM4 modulator driver with integrated digital eye monitoring and link training.
• Fully programmable linear output driver and equalizer for unparalleled signal integrity.
• Automatic gain control supporting a wide range of input and output voltages.
• More than 50% lower power consumption compared to non-CMOS drivers, significantly reducing operating costs and environmental impact.
• Compact form factor and integration-ready design for seamless deployment in QSFP-DD/OSFP optical modules.

Additional TS8401/02 Benefits

• Lower Power Consumption: Leveraging advanced design techniques in CMOS, the TS8401/02 operates at significantly lower power levels than existing DSP and SiGe-based solutions, marking a new standard in energy efficiency.
• Reduced Latency: Due to their discrete-time nature, DSP-based re-timers must slow down the data traffic to perform the required data conversion, serialization/deserialization, and filtering functions. By eliminating the latency-causing building blocks in the continuous-time signal path, TS8401/02 significantly reduces data transmission latency.
• Digital Eye Monitor: The on-board digital sampling scope in the TS8401/02 provides unparalleled flexibility and real-time insights into link performance, ensuring optimal signal integrity and reliability.
• Link Training with Host SerDes: The TS8401/02 supports seamless integration and automatic configuration with host systems, further streamlining the deployment and operation of high-speed optical links.


The TS8401 features wire bond pads, while the TS8402 offers the same capabilities in a flip-chip version.

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New Photonics debuts Transmitter-on-Chip PIC

NewPhotonics introduced its second generation photonic integrated circuit with integrated optical equalizer for high-throughput optical interconnects. The enhanced transmitter-optimized chip offers breakthrough minimal latency and power performance at 800 GBps and 1.6 TBps for linear receive optics (LRO) and linear drive pluggable optics (LPO) applications in the data center.

The NewPhotonics NPG102 PIC is an octal and quad parallel single mode (PSM) transmitter for 8x and 4x 200G PAM4 transceivers. The silicon photonics chips monolithically integrate elements of the transmitter including laser, modulator and an optical equalizer enabling consistent optical link performance and extended distance. The best-in-class transmitter design simplifies system integration and improves OEM manufacturing yield and transceiver reliability.

The optical equalizer located closest to TP2 facilitates signal dispersion compensation that enables consistent optical link performance and interoperability. Optical signal processing enables >1000x lower latency resulting in lower system pJ/bit.

Key Highlights:

• Performance consistency, improved distance, lower latency and power
• Improved transceiver yields and extended reliability
• 3.9W low power consumption
• Simplifies system assembly with flip-chip package

"AI continues to drive data center processing needs of large language models (LLMs) ramping requirements for low power and low latency fiber connectivity," said Doron Tal, SVP and GM Optical Connectivity at NewPhotonics. "The differentiating utility of linear drive and optical equalization technology enables LPO modules to operate in all ports with different insertion losses ensuring interoperability between different host vendors and enabling a low power, low latency DSP-free alternative."

https://www.newphotonics.com/post/introducing-our-new-transmitter-on-chip-pic-with-integrated-equalizer

Intel integrates 224Gbps SerDes with NewPhotonics' Engine

Wednesday, December 06, 2023    

Intel and NewPhotonics announced a milestone achievement: the integration of Intel new 224Gbps electrical SerDes design with NewPhotonics' Photonics Engine, resulting in an end-to-end direct modulation electrical-to-optical link utilizing PAM4 modulation.The electrical-to-optical link incorporates a wide bandwidth photodetector (PD) and Modulator, supporting the end-to-end 224Gbps data transfer."We are thrilled to have achieved the successful integration...

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Corning intros Multifiber Pushlok connectors

Corning introduced its Multifiber Pushlok Technology for simplifying and accelerating fiber deployments.

Multifiber Pushlok is a “stick-and-click” connector technology thatallows operators to deploy more fiber in tighter spaces – an essential consideration for increasing data usage. It is a key feature in a new line of Evolv solutions, which take complicated splicing tasks out of the field to help installers connect homes and businesses more efficiently.

The technology enhances three new Corning Evolv solutions:

• Evolve Assemblies with Multifiber Pushlok Technology add flexibility to network architecture with a variety of sizes and density options. Multifiber Pushlok’s tactile and audible feedback simplifies the cable assemblies’ installation.
• Evolve Terminals with Multifiber Pushlok Technology include a new “stubless” version that reduces packaging material by up to 30% per assembly, allowing for up to 45% more product per shipping pallet.  
• Evolv FlexNAP with Multifiber Pushlok Technology is “preconnectorized” to fit operators’ customer-specific locations, reducing their reliance on skilled labor and delivering cost savings of at least $25 per home, compared to traditional splice methods. The new system on RPX cable fits into 1.25-inch ducts, surpassing legacy solutions constrained to 2-inch ducts. This results in up to a 50% reduction in carbon footprint through minimized duct material usage.* The system also features a new built-in, locatable dust cap, which allows operators to swiftly locate the system for buried deployments and simplify network-troubleshooting efforts.

“We’re working alongside our customers to address new and ongoing challenges, such as cost constraints, labor shortages, and aggressive deployment timelines,” said Bob Whitman, vice president of market development, Carrier Networks, Corning Optical Communications. “Our Multifiber Pushlok Technology will help network operators bring the benefits of high-speed connectivity to more lives around the world – faster and more easily.”

https://www.corning.com/worldwide/en/about-us/news-events/news-releases/2024/03/corning-advances-its-evolv-portfolio-of-connectivity-solutions-to-help-network-operators-connect-the-unconnected.html

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Coherent opens 6-inch indium phosphide (InP) wafer fabrication

Coherent has established the world’s first capability for 6-inch indium phosphide (InP) wafer fabrication, in the company’s Sherman, Texas, and Järfälla, Sweden, wafer fabs. 

Coherent is in the process of qualifying several existing products on its 6-inch InP platform, including a 200G electro-absorption modulated laser (EML), 200G distributed-feedback laser and Mach-Zehnder modulator (DFB-MZ), 100G EML, high-speed photodetectors, and high-power CW lasers for silicon photonics applications. The company expects to transition the bulk of its production from 3-inch InP to 6-inch InP in the next few years to fully leverage the benefits of larger wafer size, higher yield, and improved performance that will be required to provide a sustainable competitive advantage in its communications and sensing markets.

“We are very excited to announce our 6-inch indium phosphide wafer fabrication capability in both our Sherman and Järfälla fabs, which is a result of our continuous investment in innovation and technology development, and our years of investment and operating experience in high-volume VCSEL array manufacturing for mobile handsets,” said Dr. Giovanni Barbarossa, Chief Strategy Officer and President, Materials Segment.  “Vertical integration at scale is a core strategy that we have been relying upon in several of our markets, and it has enabled our optoelectronics products to win in the marketplace by delivering world-class quality, performance, time-to-market, and cost advantage.”

“Moving to 6-inch wafers will enable us to continue to deliver massive productivity improvements, including manufacturing 4x the number of devices per wafer, achieve a greater than 60% reduction in die cost, and allow us to transition our fabs to higher-capacity, more-efficient automated process tools,” said Dr. Beck Mason, Executive Vice President, Telecommunications. “This capability will allow us to meet the growing demand for our indium phosphide products in several of our core markets, while enhancing our competitiveness and profitability.”

https://www.coherent.com/news/press-releases/worlds-first-6-inch-inp-scalable-wafer-fabs-paving-the-way-for-the-next-generation-of-lasers-for-ai-transceivers-and-6g-wireless-networks

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Avicena's Sub-pJ/bit LightBundle Chiplet Interconnect covers 10m

Avicena unveiled its new scalable LightBundle chiplet interconnect for extending ultra-high density die-to-die (D2D) connections up to 10m at multi-Tbps/mm shoreline bandwidth density and sub-pJ/bit energy efficiency. 

The new chiplet interconnect, which is based on Avicena’s LightBundle platform, supports unprecedented shoreline density and energy efficiency for HPC and AI cluster architectures.

Currently, High Bandwidth Memory (HBM) modules must be located within a few millimeters of a Graphics Processing Unit (GPU), limiting accessible memory bandwidth and capacity based on GPU shoreline. 

Avicena says its LightBundle chiplet interconnect extends HBM and other ultra-high performance D2D connections up to 10m while dissipating < 1pJ/bit for the optical interconnect and supporting multi-Tbps/mm beachfront density. This enables GPUs and other high-performance ICs to greatly increase their total IO bandwidth, accessing vastly more HBM and relieving inter-processor bottlenecks. The LightBundle chiplet is compatible with standard multichip packaging and supports a wide range of D2D interfaces including standard and advanced versions of UCIe and BOW. Avicena is working with selected partners on different implementations. Initial prototypes will be available in the second half of 2025.

“At Avicena, we are excited to announce our ultra-low power scalable chiplet interconnect based on our LightBundle platform,” says Bardia Pezeshki, Founder and CEO of Avicena. “The first D2D implementation will be an 8Tbps UCIe advanced interconnect with a total chiplet footprint of 4mm x 7mm, beachfront density of 2Tbps/mm and power consumption of < 12W.”

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NLM Photonics Names Brad Booth as New CEO

NLM Photonics, a start-up based in Seattle, named current board member Brad Booth as its new CEO, replacing co-founder Gerard Zytnicki, who will stay in a leadership role as Chief Operating Officer and continue serving on the Board of Directors as Chairperson. 

Booth previously served at Meta Platforms and Microsoft Azure, where he focused on developing next-generation optical connectivity solutions for Cloud and AI data centers. Previously, he worked at Dell, Intel, and Bell-Northern Research. Booth led the formation of the Ultra Ethernet Consortium, the Ethernet Technology Consortium, the Consortium for On-Board Optics, and the Ethernet Alliance

“We are excited about the places Brad can take NLM,” says Zytnicki. “His years of expertise in cloud and AI/ML couldn’t come at a better time as we propel NLM’s high-efficiency modulator technology toward commercialization.”

https://www.nlmphotonics.com/2024/03/25/brad-booth-new-ceo/

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Ericsson to cut 1,200 jobs in Sweden

Ericsson plans to cut approximately 1,200 jobs in Sweden. The company confirmed that it has opened negotiations with the unions.

In addition to the headcount reduction, the cost saving initiatives cover various areas such as reduction of consultants, streamlining of processes, and reduced facilities.

https://www.ericsson.com

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Pilot Photonics targets CPO, secure EIC award

Pilot Photonics, a start-up based in Dublin, Ireland, secured €2.5M from the European Innovation Council (EIC) to develop, integrate and commercialize key technology blocks relevant to a coherent co-packaged optics (CPO) solution.

Pilot Photonics said it continues to develop a number of its patented technologies including comb lasers, ring resonator IQ modulators and comb-enhanced DSP algorithms. These innovations are relevant to both pluggable and CPO architectures today and can help unlock coherent communication inside the datacentre. They enable datacentre switches at 204.8T and beyond as well as longer reach CPO systems at 10km (LR) distances or more.

The funding is provided through the EIC’s Transition programme and involved a rigorous evaluation process consisting of a highly competitive written proposal stage, followed by an interview stage with a 7-person panel of experts.

“The low-hanging fruit for scaling CPO, namely power splits and coarse wavelength multiplexing is already taken” said Dr. Frank Smyth, founder, and CTO at Pilot Photonics, “This project recognises that continued densification of the interconnects is required for future cloud and AI/ML network scaling. It develops key enabling technologies such as comb laser technology to densify the wavelength grid and ring resonator IQ modulators to increase the information spectral density. We’re excited to get it underway”.

https://www.pilotphotonics.com

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