
Cadence Design Systems confirmed the tapeout of its 16G UCIe 2.5D advanced package IP on TSMC’s 3nm (N3E) process technology. Cadence UCIe IP provides an open standard for chiplet die-to-die communication, which is becoming more critical for artificial intelligence/machine learning (AI/ML), mobile, automotive, storage and networking applications.Cadence said it is currently engaged with a pipeline of Tier 1 customers, and UCIe advanced package...