Marvell introduced the first 112G 5nm SerDes solution that has been validated in hardware. The company also confirmed that it has recently secured a new custom ASIC design win customer that will embed this new IP to build next generation top-of-rack (ToR) and spine switches for leading hyperscale data centers.
The Marvell 5nm SerDes solution doubles the bandwidth of current systems based on 56G while enabling the deployment of 112G I/Os. The device offers the ability to operate at 112G PAM4 across channels with >40dB insertion loss. The solution also delivers power reduction of more than 25% compared to 7nm, enabling systems with tight thermal/power constraints and helping to drive down total cost of ownership. The power reduction of Marvell's high-speed SerDes enables scale up of bandwidth within acutely constrained 5G applications.
Marvell plans to offer a complete product suite of PHYs, switches, data processor units (DPUs), custom server processors, controllers, accelerators and custom ASICs in 5nm, delivering end-to-end interoperable infrastructure solutions. This interoperability between Marvell components will allow customers to significantly reduce their product development and validation cycle time, and time-to-market.
"Our new 112G 5nm SerDes solution, with its industry-leading power, performance and area metrics is a true game changer and will help scale data infrastructure to meet growing interconnect requirements," said Sandeep Bharathi, senior vice president of Central Engineering at Marvell. "System performance is typically limited by bandwidth and power in most infrastructure applications, and our new 112G solution in 5nm addresses this by doubling the bandwidth, while reducing the overall I/O power."
"We are excited to bring this proven 112G SerDes to our custom ASIC partners looking for the highest throughput at the lowest power in the industry. Our customers in multiple markets have confirmed for us that this IP exceeds their system requirements for performance and power consumption," said Kevin O'Buckley, vice president and general manager of the ASIC BU at Marvell. "Leveraging this 5nm SerDes IP across our Marvell platform allows our customers to build entire interoperable data center, wireless and wired networking systems using Marvell standard products, customized standard products and full custom ASIC solutions."
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Marvell debuted a cutomizable ASIC targetting applications ranging from next generation 5G carriers, cloud data centers, enterprise and automotive. Marvell’s new ASIC solution enables a multitude of customization options and a differentiated approach with best-in-class standard product IP including Arm-based processors, embedded memories, high-speed SerDes, networking, security and a wide range of storage controller and accelerators in 5nm and below. With...
