Synopsys introduced a 1.6T Ethernet IP solution to help companies build the fastest silicon for AI and data center applications.
Highlights:
- The Synopsys IP solution includes 1.6T MAC and PCS Ethernet controllers, 224G Ethernet PHY IP, and verification IP, aimed at reducing time to market for AI and HPC networking chips.
- The 1.6T Ethernet IP solution is designed to improve energy efficiency in hyperscale data centers, potentially cutting interconnect power consumption by up to 50% compared to current SoC implementations.
- Synopsys' new 1.6T Ethernet MAC and PCS Controllers feature a multi-channel, multi-rate design that can reduce area usage by 50% and lower latency by 40%, thanks to a patented Reed-Solomon Forward Error Correction architecture. This ensures reliable data transmission across Ethernet rates from 10G to 1.6T.
- The 224G Ethernet PHY IP is silicon-proven to provide strong link performance, excellent signal integrity, and seamless interoperability across various channel lengths.
- Synopsys introduces the industry's first Ethernet verification IP capable of supporting speeds up to 1.6T, utilizing native SystemVerilog and Universal Verification Methodology to accelerate the time to first test.
“The massive compute demands of hyperscale data centers require significantly faster Ethernet speeds to enable emerging AI workloads,” said John Koeter, senior vice president of marketing and strategy for IP, Synopsys. “Our complete IP solution for 1.6T Ethernet, pre-verified subsystems, successful ecosystem interoperability, and decades of expertise in developing and delivering the industry’s broadest interface IP portfolio allow designers to confidently integrate the necessary functionality into their SoCs with less risk.”
