Astera Labs expanded its field-tested Aries PCIe/CXL Smart DSP Retimer portfolio to include a solution that delivers low-power PCIe 6.x and CXL 3.x connectivity between next generation GPUs, accelerators, CPUs, NICs, and CXL memory controllers in data-centric systems.
As the first offering in Astera Labs’ PCIe 6.x portfolio, Aries 6 sets the stage for a smart PCIe 6.x connectivity backbone.
New Aries 6 Retimers for PCIe 6.x/CXL 3.x highlights:
- Industry’s lowest power Retimers (11W typical for PCIe 6.x 16-Lane configuration)
- Low-latency connectivity up to 64 GT/s per lane
- Leading signal integrity performance with 36dB@64G PAM4 SerDes and DSP customized for demanding AI server channels to ensure robust PCIe 6.x links
- Offered in multiple lane variants (16-Lane and 8-Lane) to support PCIe 6.x and PCIe 5.x applications
- Offered in multiple form-factors (silicon chips, Smart Cable Modules, and boards) for robust Chip-to-Chip, Box-to-Box, and Rack-to-Rack PCIe/CXL signal reach extension by up to 3x
- Seamless upgrade from second generation Aries 5 Retimers to third generation Aries 6 Retimers following industry standard footprints
- Extensive observability of link health for fleet management and platform level performance optimization with the enhanced COnnectivity System Management and Optimization Software (COSMOS) suite, featuring new in-band and out-of-band diagnostics
Casey Morrison, Chief Product Officer, Astera Labs, said, “PCIe 6.x technology’s superior bandwidth is required to handle data-intensive workloads and to maximize utilization of AI accelerators, but the faster speeds introduce new signal integrity issues in hyperscale platforms. Aries Smart DSP Retimers have set the gold standard for addressing critical PCIe/CXL connectivity challenges with a solid track record of robust performance and seamless interoperability. We’re proud that our third generation of Aries Retimers with support for PCIe 6.x, PCIe 5.x, and CXL 3.x have now been sampled to leading AI and cloud platform providers.”
