Kioxia and Western Digital provided an updated on their next generation flash memory technology.
The 218-layer 3D flash leverages 1Tb triple-level-cell (TLC) and quad-level-cell (QLC) with four planes and features innovative lateral shrink technology to increase bit density by over 50 percent. Its high-speed NAND I/O at over 3.2Gb/s, a 60 percent improvement over the previous generation, combined with a 20 percent write performance and read latency improvement, will accelerate overall performance and usability for users.
Kioxia and Western Digital reduced the cost by introducing several unique processes and architectures, enabling continued lateral scaling advancements. This balance between vertical and lateral scaling produces greater capacity in a smaller die with fewer layers at an optimized cost. The companies also developed groundbreaking CBA (CMOS directly Bonded to Array) technology, wherein each CMOS wafer and cell array wafer are manufactured separately in its optimized condition and then bonded together to deliver enhanced bit density and fast NAND I/O speed.
“The new 3D flash memory demonstrates the benefits of our strong partnership with Kioxia and our combined innovation leadership,” said Alper Ilkbahar, Senior Vice President of Technology & Strategy at Western Digital. “By working with one common R&D roadmap and continued investment in R&D, we have been able to productize this fundamental technology ahead of schedule and deliver high-performance, capital-efficient solutions.”
“Through our unique engineering partnership, we have successfully launched the eighth-generation BiCS FLASHTM with the industry's highest1 bit density,” said Masaki Momodomi, Chief Technology Officer at Kioxia Corporation. “I am pleased that Kioxia’s sample shipments for limited customers have started. By applying CBA technology and scaling innovations, we’ve advanced our portfolio of 3D flash memory technologies for use in a range of data-centric applications including smartphones, IoT devices and data centers.”
