The CXL Consortium announced the release of the CXL 3.0 specification, doubling the data rate to 64GTs compared to the 2.0 generation.
The idea with CXL is to maintain memory coherency between the CPU memory space and memory on attached devices, allowing resource sharing.
“Modern datacenters require heterogenous and composable architectures to support compute intensive workloads for applications such as Artificial Intelligence and Machine Learning – and we continue to evolve CXL technology to meet industry requirements,” said Siamak Tavallaei, president, CXL Consortium. “Developed by our dedicated technical workgroup members, the CXL 3.0 specification will enable new usage models in composable disaggregated infrastructure.”
Highlights of the CXL 3.0 specification:
- Fabric capabilities
- Multi-headed and Fabric Attached Devices o Enhanced Fabric Management
- Composable disaggregated infrastructure
- Better scalability and improved resource utilization o Enhanced memory pooling
- Multi-level switching
- New enhanced coherency capabilities o Improved software capabilities
- Doubles the bandwidth to 64GTs
- Zero added latency over CXL 2.0
- Full backward compatibility with CXL 2.0, CXL 1.1, and CXL 1.0
Board members of the CXL Consortium included Alibaba, AMD, Arm, Cisco, Dell, Google, HPE, Huawei, IBM, Intel, Meta, Micron, Microsoft, Nvidia, and Samsung.
https://www.computeexpresslink.org/download-the-specification
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