Tuesday, December 10, 2019

Lattice intros low-power FPGAs

Lattice Semiconductor introduced its new low power FPGA platform, Lattice Nexus, which targets applications such as AI for IoT, video, hardware security, embedded vision, 5G infrastructure and industrial/automotive automation.

The Lattice Nexus platform features optimized DSP blocks and higher on-chip memory capacity to enable power-efficient computing, such as AI inferencing algorithms, and runs twice as fast at half the power of Lattice’s previous FPGAs. Lattice Nexus also uses innovative circuit design to deliver key capabilities to customers, including programmable power-performance optimization and very fast configuration for instant-on type applications.


Lattice Nexus is developed on high-volume 28 nm fully-depleted silicon-on-insulator (FD-SOI) process technology from Samsung. This innovative technology features 50 percent lower transistor leakage compared to bulk CMOS, and is the best technology for delivering the low power Lattice Nexus platform.

“The Lattice Nexus platform augments the parallel processing and re-programmability of FPGAs with the power-efficient performance demanded by today’s technology trends, like AI inferencing at the Edge and sensor management. The platform also accelerates the rate at which Lattice will release future products,” said Steve Douglass, Corporate Vice President, R&D, Lattice Semiconductor. “Additionally, the Lattice Nexus platform offers easy-to-use solution stacks targeting high-growth applications that help customers more quickly develop their systems, even if they are not expert in FPGA design.”

www.latticesemi.com/LatticeNexus