Microchip announces Terabit-Scale Ethernet PHY with MACsec

Microchip Technology introduced its META-DX1 family of Ethernet Physical-Layer (PHY) devices that integrates, onto a single chip, Ethernet ports from 1 Gigabit Ethernet (GbE) to 400 GbE, flexible Ethernet (FlexE), Media Access Control Security (MACsec) link encryption and nanosecond timestamping accuracy at terabit capacity.

The META-DX1, which was developed by Microchip's Microsemi division, enables line cards to quadruple in capacity – from 3.6 terabits per second (Tbps) to 14.4 Tbps with 36 ports of 400 GbE or 144 ports of 100 GbE – while supporting key features needed by service providers.


The META-DX1 family uniquely combines MACsec and FlexE into one solution. The META-DX1 MACsec engine secures traffic leaving the data center or enterprise premises, and FlexE enables both cloud and telecom service providers to meet capacity requirements while reducing fiber plant capital expenditures by optimally configuring links beyond today’s fixed-rate Ethernet so they can use low-cost, high-volume optics.

High-performance timestamping enables nanosecond-level accuracy on every port. This will support timing requirements of 5G mobile base stations.

The META-DX1 also brings a flexible crosspoint switching capability that makes it easier for OEMs to navigate the market transition from 25 Gbps NRZ and 56 Gbps PAM-based architectures by enabling them to support a single design or SKU for both 100 GbE (QSFP28) and 400 GbE (QSFP-DD) optics.

“The META-DX1 family was purpose-built to unify into a single hardware and software offering the broad range of capabilities service providers need in their network buildouts that connect enterprise and data center services to the cloud and emerging 5G applications,” said Babak Samimi, vice president for Microchip’s Communications business unit.  “By delivering the highest-density Ethernet ports coupled with MACsec, FlexE and the nanosecond packet timing performance needed for 5G, we’ve introduced an innovative Ethernet connectivity platform for telecom and cloud service provider routers and switches, as well as optical transport equipment.”

Initial META-DX1 family members will sample during Q3 2019.

https://www.microchip.com/
https://www.microsemi.com/META-DX1

Microsemi and Acacia collaborate on Flexible Rate Optical at up to 600G

Thursday, January 24, 2019  Acacia, Microsemi  

Microsemi and Acacia Communications announced interoperability between Microchip’s DIGI-G5 Optical Transport Network (OTN) processor and Acacia’s AC1200 Coherent Module.

Microsemi's DIGI-G5 OTN processor supports FlexE and OTUCn protocols, enabling new terabit scale line cards with flexible rate optical interfaces for packet optical transport platforms. Acacia's AC1200 modules support for metro and data center interconnect networks. Specifically, while the DIGI-G5 processes client traffic into OTN, the 1.2T AC1200—powered by Acacia’s Pico digital signal processor (DSP) ASIC—on the line card will enable the OTN connections over two 600G tunable DWDM wavelengths with flexible transmission three-dimensional (3D) shaping features. These features, which include fractional quadrature amplitude modulation (QAM) and adaptive baud rate optimize transmission reach and capacity, approaching theoretical limits on a wide range of network configurations, in a power efficient manner.

The companies said their collaboration enables the first flexible rate system architectures with an established ecosystem to support the market’s transition to 200G, 400G, 600G and flexible rate OTN networks built with new Flexible Ethernet (FlexE) and OTUCn protocols. FlexE was designed to provide up to 30 percent greater bandwidth efficiency compared to traditional Ethernet link aggregation (LAG) with fewer limitations. Combining it with OTUCn and tunable fractional dense wavelength division multiplexing (DWDM) transmission brings service providers the potential to improve their OTN network capacity by up to 70 percent.