Cavium Networks introduced its latest generation technology integrating 8 to 32 enhanced MIPS64 cores with up to 48GHz of 64 bit compute power in a single chip combined with over 85 L3-L7 application and security acceleration engines, virtualization features, 100Gbps of connectivity, and a new "Real Time Power Optimizer" that dynamically adjusts power depending upon the application-level processing requirement. 
This level of processing power enables network platforms with very low latency and power consumption at up to 40Gbps using a single OCTEON II chip and up to 100Gbps using multiple chips.
The new OCTEON II processors also deliver up to 4x higher performance over the current OCTEON Plus processors in a fully software compatible fashion, enabling OEM customers to re-use existing software and system designs.
Target applications include routers, switches, appliances, 3G/4G wireless base stations, RNCs, xGSNs, evolved packet core, services gateways, DPI equipment, storage switches and intelligent server adapters.
Rapid adoption of data center and cloud computing initiatives coupled with dramatic traffic growth in both wired and mobile
Key features of the Octeon IIs include:
- New cnMIPS64 v2 Cores with up to 48GHz of Compute -- 8, 16, 24, or 32 superscalar MIPS64 cores, each with 37KB I-cache, 32KB D-cache operating at up to 1.5GHz for up to 48GHz of standard-ISA based processing. This level of processing is 3x to 4x of that available in highest-end alternative next gen solutions and is a new record. The cnMIPS v2 cores also deliver up to 2.5x control plane performance per-core vs. OCTEON Plus, significantly increasing applicability in high-end control plane applications.
- HyperConnect Cross-Bar with Independent I/O and Coprocessor Networks: The OCTEON II cores are coupled with up to 4MB partition-able, low latency L2 cache using a HyperConnect cross-bar with over 6Tbps throughput. The overall architecture is optimized to deliver lower-latency and deterministic performance compared to ring or mesh architectures. Independent I/O and Coprocessor networks enable superior performance for a wide range of application workloads.
- 40+ Gbps of Packet processing and TCP performance.
- 40+ Gbps IPsec, SSL Security performance. OCTEON II adds WAPI support in encryption/ decryption engines to support China-specific WLAN deployments. Additionally, it includes Snow3G hardware acceleration, to address security requirements of 4G mobile networks.
- Enhanced Compression/decompression acceleration -- Up to 20Gbps.
- Third generation HFA Deep Packet Inspection engines deliver deterministic throughput up to 15Gbps independent of number of rules and number of flows, a new and essential capability not available in existing solutions.
- Multicore hardware load balancing, scaling and packet ordering allowing linear performance scalability across 32 cores.
- Interfaces include up to four 72-bit ECC-protected DDR3 interfaces with 400+Gbps of bandwidth
- SGMII, RXAUI, XAUI and double-rate XAUI interfaces for up to 12x GbE, 4x 10GbE and 2x 20GbE Ethernet connectivity
- Interlaken or Interlaken-LA controller with up to x8 lane widths, providing a channelized interface up to 40Gbps or coprocessor connectivity
- Two PCIe Gen2 controllers, width up to x8 lanes
- New Real Time Power Optimizer provides the ability to dynamically adjust per-core effective - frequency resulting in lower power consumption on a real time basis based on application or network-level workload. Additionally fine-grained auto power-down capability for unutilized coprocessors and I/O interfaces.
Cavium also noted that its OCTEON II product line is supported by over 50 partners providing operating systems and tools, software applications and stacks, debuggers, complementary silicon, ATCA and hardware appliances, hardware and software consulting, and other products and services.
The CN68XX will sample in Q4 2010. The CN68XX will be offered in 16, 24, and 32-core options and is software compatible with the OCTEON II CN63XX 2 to 6 core processors.
http://www.cavium.tworks.com
