LSI Logic Announces New DSP Cores Featuring Cached Memory

LSI Logic introduced three additions to its family of "ZSP" licensable digital signal processor (DSP) cores. Featuring cached memory, the new cores provide greater flexibility in choosing how to distribute instructions and data between on-chip and external memory, enabling more robust ASICs and System-on-Chip (SoC) designs.



LSI Logic said for applications such as IP phones, ATA modules, portable media players and 2/2.5/3G handsets, large programs can be managed with greater efficiency by storing most of the program code and data off-chip providing additional benefit in the form of chip cost savings.



The new ZSP cores are also supported by a broad selection of applications software, including all of the popular G.7XX Codecs, as well as algorithms for functions such as echo cancellation, tone detection and caller ID generation. Multiple audio and video standards are supported as well, such as H.264, MP3, AACPlus, WMA and AC3.

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