Marvell announced plans to produce 2nm semiconductors optimized for accelerated infrastructure in collaboration with TSMC.
Marvell's 2nm platform will leverage the company's IP portfolio that covers the full spectrum of infrastructure requirements, including high-speed long-reach SerDes at speeds beyond 200 Gbps, processor subsystems, encryption engines, system-on-chip fabrics, chip-to-chip interconnects, and a variety of high-bandwidth physical layer interfaces for compute, memory, networking and storage architectures. The company says these technologies will serve as the foundation for producing cloud-optimized custom compute accelerators, Ethernet switches, optical and copper interconnect digital signal processors, and other devices for powering AI clusters, cloud data centers and other accelerated infrastructure.
In 2020, Marvell adopted TSMC's 5nm node for its highest performance devices. At the time, TSMC's 5nm was the industry's most advanced process node. Marvell followed the achievement with several 5nm designs and the first portfolio for infrastructure silicon on TSMC 3nm processes.
"Tomorrow's artificial intelligence workloads will require significant and substantial gains in performance, power, area, and transistor density. The 2nm platform will enable Marvell to deliver highly differentiated analog, mixed-signal, and foundational IP to build accelerated infrastructure capable of delivering on the promise of AI," said Sandeep Bharathi, chief development officer at Marvell. "Our partnership with TSMC on our 5nm, 3nm and now 2nm platforms has been instrumental in helping Marvell expand the boundaries of what can be achieved in silicon."
"TSMC is pleased to collaborate with Marvell in pioneering a platform for advancing accelerated infrastructure on our 2nm process technology," said Kevin Zhang, senior vice president of business development at TSMC. "We are looking forward to our continued collaboration with Marvell in the development of leading-edge connectivity and compute products utilizing TSMC's best-in-class process and packaging technologies."
