Keysight Technologies' AresONE-M 800GE Layer 1-3 Ethernet performance test platform set a new benchmark for validating Ethernet silicon switches by processing 1.2 Tbps of traffic across 64 x 800GE links while measuring loss, latency, and jitter.
The tests were conducted on the Marvell Teralynx 10 Ethernet switch chip.
Highlights from the validation include:
- High throughput and high speed – The Keysight AresONE-M 800GE generated 51.2 Tbps of traffic, sending it successfully through the Teralynx 10 switch to test its limits. The test validated an 800GE interface speed based on 112G SerDes, which facilitates faster data transfer between devices and extended reach in data center interconnects or telecommunications networks that run data-intensive AI applications.
- Scalability – Eight AresONE-M 8-port chassis were chained together, providing an industry first 64 x 800GE link configuration to achieve a high scale test bed running at 800GE line rate.
- Low latency – Low latency is critical for achieving the shortest job completion time for AI training and other highly distributed applications. These AI workloads depend on the switching fabric to provide the lowest possible latency — and to do so predictably.
- Performance analysis – Beyond the need for high bandwidth and low latency, measuring the performance of all 64 x 800GE links was an important aspect of the testbed, providing deeper, actionable analytics around loss, latency, and jitter at line rate.
Rishi Chugh, Vice President of Product Marketing, Network Switching, Marvell, said: “To definitively measure and validate the low-latency capabilities of Teralynx 10, Marvell turned to Keysight and its industry-leading AresONE-M 800GE test equipment. Their thorough evaluation and collaboration with our team made the process smooth and ensured the integrity of the strong results we achieved.”
Ram Periakaruppan, Vice President and General Manager, Network Test & Security Solutions, Keysight, said: “The switching fabric is a vital component of the back-end network architecture used for AI training. AI training workloads trigger a huge increase in traffic volume and compared to front-end networks, are persistently pushing this higher traffic volume around the clock. At these sustained rates, benchmarking low latency becomes very critical for ensuring that the AI training algorithms achieve the most efficient job completion time.”
Keysight intros 800GE test platform
Keysight Technologies introduced its AresONE-M 800GE Layer 1-3 Ethernet performance test platform, supporting data center interconnect speeds from 10GE to 800GE.
The new Keysight AresONE-M 800GE enables design engineers and data center operators to validate networking equipment interoperability and bandwidth performance while supporting the transition to 400GE and 800GE networks with the capability to also test slower, legacy Ethernet speeds.
Highlights of the AresONE-M 800GE:
- Ethernet speeds – 1x800GE, 2x400GE, 4x200GE, and 8x100GE.
- PAM4 and NRZ signaling support – Features 106.25 Gb/s host electrical lane signaling with the ability to downshift to the lower electrical lane speeds of 53Gb/s and 25Gb/s for 400GE and 100GE speeds.
- Single test platform – Supports all required forward error correction (FEC) types and a full array of in-depth link tuning, stability, reliability, and performance measurement statistics.
- Complete 800GE high-scale protocol emulation and performance testing – Provides the protocol support required to test enterprise, metro, and cloud-capable Layer 2 and Layer 3 switching and routing network equipment through the IxNetwork software application.
- Highest port density available today for 800GE test systems – Supports 8 ports in a single, 2-rackmount unit chassis with additional configurations for 2 and 4 ports.
The AresONE-M 800GE uses an integrated physical layer Digital Signal Processor (DSP) from Credo Technology Group for fast and efficient data transfer with low latency that enables data transit requirements of hyperscalers, enterprises, 5G carriers, and service providers. The Credo chip also optimizes power consumption to reduce operational costs, minimize heat dissipation, and meet energy-efficient standards for advanced networks.
