Intel unveiled its IPU roadmap extending through 2026, featuring new FPGA + Intel architecture platforms (code-named Hot Springs Canyon) and the Mount Morgan (MMG) ASIC, as well as next-generation 800GB products. The discussion also a look at Intel's open-source software foundation, including the infrastructure programmer development kit (IPDK), which builds upon SPDK, DPDK and P4.
In terms of the timeline, Intel's roadmap includes:
- 2022: Mount Evans, the company's first ASIC IPU; and Oak Springs Canyon, Intel’s second-generation FPGA IPU shipping to Google and other service providers.
- 2023/24: introduction of 400 Gbps IPUs, code-named Mount Morgan and Hot Springs Canyon,
- 2025/26: introduction of 800 Gbps IPUs
Here are some details on the 200 Gbps and 400 Gbps IPUs:
Mount Evans -- the code name for Intel’s first ASIC IPU, architected and developed with Google Cloud
- Hyperscale-ready, it offers high-performance network and storage virtualization offload while maintaining a high degree of control.
- Provides a programmable packet processing engine enabling use cases like firewalls and virtual routing.
- Implements a hardware accelerated NVM storage interface scaled up from Intel Optane technology to emulate NVMe devices.
- Deploys advanced crypto and compression acceleration, leveraging high- performance Intel Quick Assist technology.
- Can be programmed using commonly deployed, existing, software environments, including DPDK, SPDK; the pipeline can be configured utilizing P4 programming.
- Shipping is expected to begin in 2022 to Google and other service providers; broad deployment is expected in 2023.
Oak Springs Canyon -- the code name for Intel’s 2nd generation FPGA-based IPU platform built with the Intel Xeon D and the Intel Agilex FPGA, the industry’s leading FPGA in power, efficiency, and performance.
- Network virtualization function offload for workloads like open virtual switch (OVS) and storage functions like NVMe over fabric and RoCE v2
- Standard yet customizable platform that enables customers to customize their data path and their solutions with FPGA and Intel Xeon-D with software like Intel Open FPGA Stack, a scalable, source-accessible software and hardware infrastructure
- Programmable using commonly deployed existing software environments, including DPDK and SPDK, which have been optimized on x86.
- A more secure, high speed 2x 100 gigabit Ethernet network interface with the hardened crypto block
- VirtIO support in Hardware for Native Linux support
Mount Morgan -- a next-generation ASIC IPU expected in 2023/2024.
Hot Springs Canyon -- a next-generation FPGA-based IPU platform expected in 2023/2024.
https://www.intel.com/content/www/us/en/newsroom/home.html
Intel demos Xeon + Tofino switch + Mount Evans IPU
Google collaborates on Intel's ASIC-based infrastructure processor
Intel rolls FPGA-based Infrastructure Processing Unit (IPU)
