AMD intros first data center CPU using 3D die stacking

AMD announced the general availability of its 3rd Gen AMD EPYC data center processors with AMD 3D V-Cache technology, formerly codenamed “Milan-X.” 

The new processors feature the industry’s largest L3 cache,3 delivering the same socket, software compatibility and security capabilities as 3rd Gen EPYC CPUs. AMD said its 3D V-Cache technology solves physical layout challenges by bonding the AMD “Zen 3” core to the cache module, increasing the amount of L3 while minimizing latency and increasing throughput. 

“Building upon our momentum in the data center as well as our history of industry-firsts, 3rd Gen AMD EPYC processors with AMD 3D V-Cache technology showcase our leadership design and packaging technology enabling us to offer the industry’s first workload-tailored server processor with 3D die stacking technology,” said Dan McNamara, senior vice president and general manager, Server Business Unit, AMD. “Our latest processors with AMD 3D V-Cache technology provide breakthrough performance for mission-critical technical computing workloads leading to better designed products and faster time to market.”

https://www.amd.com/en/press-releases/2022-03-21-3rd-gen-amd-epyc-processors-amd-3d-v-cache-technology-deliver-outstanding

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