The new high-performance Intel FPGA Programmable Acceleration Card (Intel FPGA PAC) D5005 is now shipping now in the HPE ProLiant DL3809 Gen10 server.
The Intel FPGA PAC D5005 acceleration card, which is based on an Intel Stratix 10 SX FPGA, provides high-performance inline and lookaside workload acceleration to servers based on Intel Xeon Scalable processors using the Intel Acceleration Stack, which includes acceleration libraries and development tools. Initial workloads specifically developed for the Intel FPGA PAC D5005 accelerator card include:
- AI (speech-to-text translation) from Myrtle
- Network security from Algo-Logic
- Image transcoding from CTAccel
- Video transcoding from IBEX
Compared with the Intel programmable acceleration card with Intel Arria 10 GX FPGA, the Intel FPGA PAC D5005 accelerator card offers significantly more resources including three times the amount of programmable logic, as much as 32 GB of DDR4 memory (a 4x increase) and faster Ethernet ports (two 100GE ports versus one 40GE port). With a smaller physical and power footprint, the Intel PAC with Intel Arria 10 GX FPGA fits a broader range of servers, while the Intel PAC D5005 is focused on providing a higher level of acceleration.
“The HPE ProLiant Gen10 server family is the world’s most secure, manageable and agile server platform available on the market today. By integrating the Intel FPGA PAC D5005 accelerator into the HPE ProLiant DL380 Gen10 server, we are now delivering optimized configurations for an increasing number of workloads, including AI inferencing, big data and streaming analytics, network security and image transcoding. Combined with our broad portfolio of services from HPE Pointnext, we enable our customers to accelerate time-to-value and increase ROI,” stated Bill Mannel, vice president and general manager, HPC and AI, at Hewlett Packard Enterprise.
Intel launches FPGA-based accelerator for 5G core and vRAN
Intel is introducing an FPGA-based acceleration card for 5G core and virtualized radio access network solutions.
The Intel FPGA Programmable Acceleration Card N3000 is designed to accelerate network traffic for up to 100 Gbps and supports up to 9GB DDR4 and 144MB QDR IV memory for high-performance applications. Programmability and flexibility of an FPGA allow customers to create tailored solutions by utilizing reference IPs for networking function acceleration workloads such as vRAN, vBNG, vEPC, IPSec and VPP.
Affirmed Networks is using Intel’s FPGA PAC in a new solution for 5G core network (CN)/evolved packet core – a 200 Gbps/server that provides smart load balancing and CPU cache optimizations.
Rakuten, the soon to be the operator of Japan’s newest mobile network, is including Intel x86 and FPGA-based PAC for acceleration from the core to the edge to provide the first end-to-end cloud-native mobile network. Intel FPGA PAC N3000 is the distributed unit accelerator next to Intel® Xeon Scalable processor where Layer 1 functions, such as forward error correction and front haul transmission, are offloaded onto an Intel FPGA.
The Intel FPGA Programmable Acceleration Card N3000 is designed to accelerate network traffic for up to 100 Gbps and supports up to 9GB DDR4 and 144MB QDR IV memory for high-performance applications. Programmability and flexibility of an FPGA allow customers to create tailored solutions by utilizing reference IPs for networking function acceleration workloads such as vRAN, vBNG, vEPC, IPSec and VPP.
Affirmed Networks is using Intel’s FPGA PAC in a new solution for 5G core network (CN)/evolved packet core – a 200 Gbps/server that provides smart load balancing and CPU cache optimizations.
Rakuten, the soon to be the operator of Japan’s newest mobile network, is including Intel x86 and FPGA-based PAC for acceleration from the core to the edge to provide the first end-to-end cloud-native mobile network. Intel FPGA PAC N3000 is the distributed unit accelerator next to Intel® Xeon Scalable processor where Layer 1 functions, such as forward error correction and front haul transmission, are offloaded onto an Intel FPGA.
