Samsung Develops Highly Efficient Stacking Process for DRAM

Samsung Electronics has developed the first all-DRAM stacked memory package using "through silicon via" (TSV) technology -- a breakthrough that the company says will soon result in memory packages that are faster, smaller and consume less power.



Samsung's new wafer-level-processed stacked package (WSP) consists of four 512 megabit (Mb) DDR2 (second generation, double data rate) DRAM (dynamic random access memory) chips that offer a combined 2 gigabits (Gbs) of high density memory. Using the TSV-processed 2Gb DRAMs, Samsung can create a 4GB (gigabyte) DIMM (dual in-line memory module) based on advanced WSP technology for the first time.



In today's MCPs (multi-chip packages), memory chips are connected by wire bonding, requiring vertical spacing between dies that is tens of microns deep. That wire bonding process also requires horizontal spacing on the package board hundreds of microns wide for the die-connecting wires.



By contrast, Samsung's WSP technology forms laser-cut micron-sized holes that penetrate the silicon vertically to connect the memory circuits directly with a copper (Cu) filling, eliminating the need for gaps of extra space and wires protruding beyond the sides of the dies. These advantages permit Samsung's WSP to offer a significantly smaller footprint and thinner package.

http://www.samsung.com