NEC announced the world's first multi-layer interconnect for 32nm-node LSIs. As the integration density of Si LSI devices increases, the number of interconnects increases, resulting in higher parasitic capacitance and undesirable power consumption levels. NEC researchers developed a low-k dielectric technology based on a plasma co- polymerization technique that overcomes these issues.
http://www.nec.co.jp/press/en
Sunday, December 10, 2006
NEC Develops First 32nm-Node Multi-Layer Interconnect
Sunday, December 10, 2006
Silicon