The first wave of HyperTransport Specification 2.0 compliant devices have started to enter the market, eight months after the specification was released.
HyperTransport Specification 2.0 is a chip-to-chip interconnect technology offering performance levels of up to 2.8 Gigatransfers/second and mapping to PCI Express. Products conforming to HyperTransport Specification 2.0 support up to 22.4 Gigabytes/second aggregate bandwidth. The new products include HyperTransport-enabled 64-bit processors, I/O chipsets, silicon IP, and development tools. http://www.hypertransport.org
Thursday, October 21, 2004
First HyperTransport 2.0 Products Enter Market
Thursday, October 21, 2004
StandardsWatch