EZchip Semiconductor will acquire Tilera Corporation, a developer of high-performance multi-core processors, up to $130 million in cash. The deal includes $50 million at closing and up to an additional $80 million is payable subject to the attainment of certain future performance milestones.
Tilera, which is based in San Jose, California, offers a line of multi-core processors, network interface cards and white-box appliances for data center networking equipment.
At the high end, Tilera's TILE-Gx8072 Processor includes 72 identical processor cores (tiles) interconnected with the company's iMesh on-chip network. Each tile consists of a 64-bit processor core as well as L1 and L2 cache and a non-blocking Terabit/sec switch that connects the tiles to the mesh and provides full cache coherence among all the cores. The company offers smaller versions with 9- 16, and 36-cores. Tilera offers its own line of accelerator cards based on its processors, as well as two 1RU appliances.
EZchip said Tilera complements its own portfolio. EZchip’s next generation NPU family, the NPS, is targeting carrier edge routers as well as data center networking equipment. For these markets, the NPS brings very high performance data-plane packet processing. Unlike the use cases for multi-core CPUs, the systems that use high-speed NPUs such as the NPS are high-end systems in which the data-plane is separate from the control-plane. In these high-end systems the control-plane is typically performed on a separate general purpose CPU.
EZchip currently expects the acquisition to be neutral to slightly dilutive in 2014 and accretive in 2015 to earnings per share on a non-GAAP basis. Following the closing, Devesh Garg, the CEO of Tilera, will serve as EZchip’s President in charge of all US operations.
“We welcome the Tilera team to the EZchip family. The addition of a multi-core product portfolio to EZchip expands and diversifies our product offerings and addressable markets. While our NPU portfolio and in particular our new NPS targets high-end carrier and data center equipment in which a high-performance data-plane only NPU is required, the Tilera multi-core CPUs address a wide range of data-center systems in which both data-plane and control-plane run on the multi-core CPU,” said Eli Fruchter, CEO of EZchip Semiconductor. “Furthermore, the combination of EZchip’s and Tilera’s market-proven leading technologies, in particular EZchip’s networking expertise and Tilera’s multi-core expertise, will enable us to develop new multi-core CPUs that uniquely integrate powerful networking capabilities with the highest number of processor cores addressing a wide range of applications and market segments.”
http://www.ezchip.com
http://www.tilera.com
Tilera, which is based in San Jose, California, offers a line of multi-core processors, network interface cards and white-box appliances for data center networking equipment.
At the high end, Tilera's TILE-Gx8072 Processor includes 72 identical processor cores (tiles) interconnected with the company's iMesh on-chip network. Each tile consists of a 64-bit processor core as well as L1 and L2 cache and a non-blocking Terabit/sec switch that connects the tiles to the mesh and provides full cache coherence among all the cores. The company offers smaller versions with 9- 16, and 36-cores. Tilera offers its own line of accelerator cards based on its processors, as well as two 1RU appliances.
EZchip said Tilera complements its own portfolio. EZchip’s next generation NPU family, the NPS, is targeting carrier edge routers as well as data center networking equipment. For these markets, the NPS brings very high performance data-plane packet processing. Unlike the use cases for multi-core CPUs, the systems that use high-speed NPUs such as the NPS are high-end systems in which the data-plane is separate from the control-plane. In these high-end systems the control-plane is typically performed on a separate general purpose CPU.
EZchip currently expects the acquisition to be neutral to slightly dilutive in 2014 and accretive in 2015 to earnings per share on a non-GAAP basis. Following the closing, Devesh Garg, the CEO of Tilera, will serve as EZchip’s President in charge of all US operations.
“We welcome the Tilera team to the EZchip family. The addition of a multi-core product portfolio to EZchip expands and diversifies our product offerings and addressable markets. While our NPU portfolio and in particular our new NPS targets high-end carrier and data center equipment in which a high-performance data-plane only NPU is required, the Tilera multi-core CPUs address a wide range of data-center systems in which both data-plane and control-plane run on the multi-core CPU,” said Eli Fruchter, CEO of EZchip Semiconductor. “Furthermore, the combination of EZchip’s and Tilera’s market-proven leading technologies, in particular EZchip’s networking expertise and Tilera’s multi-core expertise, will enable us to develop new multi-core CPUs that uniquely integrate powerful networking capabilities with the highest number of processor cores addressing a wide range of applications and market segments.”
http://www.ezchip.com
http://www.tilera.com
- Tilera was founded in March 2005 and launched its first silicon product in August 2007.
- In January 2011, Tilera announced a $45 million round of funding, including investment from WestSummit Capital Management and Comerica Bank in addition to existing investors Walden International, Bessemer Venture Partners and Columbia Capital. Cisco Systems and Samsung Venture Investment Co. also participated, joining Tilera’s previous strategic investors: Broadcom, NTT Finance, VentureTech Alliance, and Quanta Computer.
- In March 2010, Tilera raised $25 million in Series C funding, including from Broadcom, Quanta Computer and NTT Financing. This brought total funding in the company to $64 million.
